GZ3 | G593-ZD2-5U HPC Server - 5U DP SXM5 H100 8-GPU Server System | Application: AI , AI Training , AI Inference & HPC Powering the Next Generation of Server Architecture and Energy Efficiency  The path to A

GZ3 | G593-ZD2-5U

HPC Server - 5U DP SXM5 H100 8-GPU Server System | Application: AI , AI Training , AI Inference & HPC

Powering the Next Generation of Server Architecture and Energy Efficiency 

The path to AMD's 5nm 'Zen 4' architecture was paved with many successful generations of EPYC innovations and chiplet designs, and AMD EPYC 9004 Series processors continue this progression. Adding a host of new features to target a wide range of workloads, the new family of EPYC processors will deliver even better CPU performance and performance per watt, and do so on a platform with 2x the throughput of PCIe 4.0 lanes that also has support for 50% more memory channels. For this new platform, GIGABYTE has products ready to get the most out of EPYC-based systems that support fast PCIe Gen5 accelerators and Gen5 NVMe drives, in addition to support for high performant DDR5 memory.

Notable Firsts in the EPYC 9004 Series

GZ3 Product Overview 

G593-SD0 Block Diagram

High Performance

Supports NVIDIA HGX™ H100 8-GPU

The NVIDIA H100 Tensor Core GPU enables an order-of-magnitude leap for large-scale AI and HPC with unprecedented performance, scalability and security for every data center. With NVIDIA AI Enterprise for streamlined AI development and deployment, NVIDIA NVLINK Switch System direct communication between up to 256 GPUs, H100 accelerates everything from exascale scale workloads with a dedicated Transformer Engine for trillion parameter language models, down to right-sized Multi-Instance GPU (MIG) partitions.

Power Efficiency

Automatic Fan Speed Control

Enabled with Automatic Fan Speed Control to achieve the best cooling and power efficiency. Individual fan speeds will be automatically adjusted according to temperature sensors strategically placed in the servers.

High Availability

Smart Ride Through (SmaRT)    

To prevent server downtime and data loss as a result of loss of AC power, we implement SmaRT in all server platforms. When such an event occurs, the system will throttle while maintaining availability and reducing power load. Capacitors within the power supply can supply power for 10-20ms, which is enough time to transition to a backup power source for continued operation.

Smart Crises Management and Protection (SCMP)

SCMP is a feature which is deployed in servers with non-fully redundant PSU design. With SCMP, in the event of faulty PSU or overheated system, the system will force the CPU into an ultra-low power mode that reduces the power load, which prevents the system from unexpected shutdown and avoids component damage or data loss.

Dual ROM Architecture   

If the ROM that stores the BMC and BIOS fails to boot, the system will reboot with the backup BMC and/or BIOS replacing the primary. Once the primary BMC is updated, the ROM of the backup BMC will automatically update the backup through synchronization. For the BIOS, it can be updated based on user's choice of firmware version.

Hardware Security

Optional TPM 2.0 Module   

For hardware-based authentication, the passwords, encryption keys, and digital certificates are stored in a TPM module to prevent unwanted users from gaining access to your data. TPM modules come in either a Serial Peripheral Interface or Low Pin Count bus.

User Friendly

Tool-less Drive Bays Design

Clipping mechanism secures the drive in place. Install or replace a new drive in seconds.

Certified Ready with Software Partners

Being a member of key software alliance partner programs enables us to rapidly develop and validate joint solutions, enabling our customers to modernize their data centers and implement IT infrastructure and application services with speed, agility, and cost optimization.